ASIC Verification

This blog is to discuss about verification programming language system verilog and UVM methodology. Also to discuss about standard protocols and Interfaces used in ASIC Design and Verification.

Showing posts with label Multi root I/O virtualization. Show all posts

Tuesday, 21 April 2015

Cross domain communication in PCIe cluster system.

http://www.eetimes.com/document.asp?doc_id=1269201
http://m.eetindia.co.in/STATIC/PDF/200808/EEIOL_2008AUG14_INTD_TA_01.pdf?SOURCES=DOWNLOAD
http://www.embedded.com/design/mcus-processors-and-socs/4006788/Using-PCIe-in-a-variety-of-multiprocessor-system-configurations